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Dr. rer. nat. Alexander Heinecke

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Address:

TU München
Institut für Informatik
Boltzmannstr. 3
85748 Garching b. München
Office:
MI 02.05.036
Email:
Heineckemail.png
Phone:
(089) 289 18 619
Fax:
(089) 289 18 607
Office Hours:
by arrangement

Awards

Publications

Volume 2014

Volume 2013

Volume 2012

Volume 2011

Volume 2010

Volume 2009

  • M. Bader and A. Heinecke: Cache Oblivious Dense and Sparse Matrix Multiplication Based on Peano Curves [pdf] [BibTeX].
    In Proceedings of the PARA 08, 9th International Workshop on State-of-the-Art in Scientific and Parallel Computing of Lecture Notes in Computer Science. Springer, December 2009. accepted for publication.
  • A. Heinecke and M. Bader: Towards many-core implementation of LU decomposition using Peano Curves [BibTeX].
    In Conference On Computing Frontiers, UCHPC-MAW '09: Proceedings of the combined workshops on UnConventional high performance computing workshop plus memory access workshop, p. 21–30. ACM, New York, May 2009.

Volume 2008


Talks

Volume 2013

  • A. Heinecke: Many-Core Architectures Boost the Pricing of Basket Options on Adaptive Sparse Grids [BibTeX].
    WHPCF'13: Sixth Workshop on High Performance Computational Finance held in conjunction with Supercomputing 2013: The International Conference for High Performance Computing, Networking, Storage and Analysis, Denver, CO, USA, November 2013.
  • A. Heinecke: Optimized Kernels for large scale earthquake simulations with SeisSol, an unstructured ADER-DG code [BibTeX].
    Supercomputing 2013, The International Conference for High Performance Computing, Networking, Storage and Analysis, Denver, CO, USA, November 2013. Poster Presentation.
  • A. Heinecke: Advanced Scientific Computing on Intel Xeon Phi [BibTeX].
    ScalPerf'13 Scalable Approaches to High Performance and High Productivity Computing, Bertinoro, Italy, September 2013. invited.
  • A. Heinecke: Advanced Scientific Computing on Intel Xeon Phi [BibTeX].
    International Conference on Parallel Computing (ParCo) 2013, Garching, Germany, September 2013. invited.
  • A. Heinecke: Accelerators in Scientific Computing: Is It Worth the Effort? [BibTeX].
    The 2013 International Conference on High Performance Computing & Simulation (HPCS 2013), Helsinki, Finland, July 2013. invited.
  • A. Heinecke: High Performance Option Pricing based on Spatially Adaptive Sparse Grids [BibTeX].
    13th International Conference Computational and Mathematical Methods in Science and Engineering 2013, Almeria, Spain, June 2013. invited.
  • A. Heinecke: Optimizing the Scalable Direct Eigenvalue Solver ELPA on state-of-the-art x86 Architectures [BibTeX].
    International Supercomputing Conference (ISC) 2013, Leipzig, Germany, June 2013. Poster Presentation.
  • A. Heinecke: FLOPS are free - Data Parallelism in the x86 Architecture [BibTeX].
    RRZE, RRZE, Erlangen, Germany, May 2013. invited.
  • A. Heinecke: Efficient Numerical Algorithms on Xeon Phi [BibTeX].
    Leogang 13, Leogang, Austria, March 2013.
  • A. Heinecke: ELPA: A Highly Scalable Eigensolver for Petaflop Applications [BibTeX].
    SIAM Computational Science and Engineering (SIAM CSE), Boston, USA, February 2013.

Volume 2012

  • A. Heinecke: Data Mining with Adaptive Sparse Grids on a Intel(R) Xeon(R) Phi(TM) Cluster [BibTeX].
    Invited Demo at Intel Booth SC12, The International Conference for High Peformance Computing, Networking, Storage and Analysis, Salt Lake City, USA, November 2012.
  • A. Heinecke: Solving High-dimensional Problems on Processors with Integrated GPU [BibTeX].
    Facing the Multicore-Challenge III, Stuttgart, Germany, October 2012. poster presentation.
  • A. Heinecke: A Note on Duality of Peak and Application Peak Performance [BibTeX].
    ScalPerf'12 Scalable Approaches to High Performance and High Productivity Computing, Bertinoro, Italy, September 2012.
  • A. Heinecke: From GPGPUs to Many-Core Co-Processors [BibTeX].
    The 2012 International Conference on High Performance Computing & Simulation (HPCS 2012), Madrid, Spain, July 2012.
  • A. Heinecke and C. Trinitis: Teaching Parallel Programming: How to use the Intel(R) Many-Core Testing Lab [BibTeX].
    The 2012 International Conference on High Performance Computing & Simulation (HPCS 2012), Madrid, Spain, July 2012. Invited Demonstration.
  • A. Heinecke: Sparse Grid Classifiers as Base Learners for AdaBoost [BibTeX].
    International Workshop on Machine Learning, Pattern Recognition & Applications (MLPRA 2012) co-located with the 2012 International Conference on High Performance Computing & Simulation (HPCS 2012), Madrid, Spain, July 2012.
  • A. Heinecke: A Cache-Aware and Vectorized Up-Down Implementation supporting Spatially Adaptive Sparse Grids [BibTeX].
    Workshop on Sparse Grids and Applications, Munich, Germany, July 2012.
  • A. Heinecke: Exploiting State-of-the-Art x86 Architectures in Scientific Computing [BibTeX].
    he 11th International Symposium on Parallel and Distributed Computing - ISPDC 2012, Munich, Germany, June 2012.
  • A. Heinecke: Unleashing the Power of Intel Xeon Phi in Data Mining [BibTeX].
    International Supercomputing Conference, Hamburg, Germany, June 2012. Invited Intel Booth Presentation.

Volume 2011

  • A. Heinecke: From GPGPUs to Many-Core Co-Processors [BibTeX].
    Scalable Approaches to High Performance and High Productivity Computing 2011, Bertinoro, September 2011. Invited Talk..
  • A. Heinecke: Towards high-performance implementations of a custom HPC kernel using Intel(R) Array Building Blocks [BibTeX], Karlsruhe, September 2011.
  • A. Heinecke: Extending a Highly Parallel Data Mining Algorithm to the Intel(R) Many Integrated Core Architecture [BibTeX].
    The 4th Workshop on UnConventional High Performance Computing 2011 (UCHPC 2011), co-located with Euro-Par 2011, Bordeaux, August 2011.
  • A. Heinecke: Making TifaMMy fit for Tomorrow: Towards Future Shared Memory Systems and Beyond [BibTeX].
    International Workshop on New Algorithms and Programming Models for the Manycore Era, APMM 2011, co-located with HPCS 2011, Istanbul, July 2011.
  • A. Heinecke and C. Trinitis: Teaching Parallel Programming: How to use the Intel(R) Many-Core Testing Lab [BibTeX].
    The 2011 International Conference on High Performance Computing & Simulation, Istanbul, July 2011. Invited Demonstration..
  • A. Heinecke: How to use Intel(R) Hyper-Threading Technology in Scientific Computing [BibTeX].
    International Supercomputing Conference, Hamburg, June 2011. Intel Booth Presentation..
  • A. Heinecke: TifaMMy on Intel(R) Knights Ferry (Intel(R) Many Integrated Core Architecture) [BibTeX].
    International Supercomputing Conference, Hamburg, June 2011. Invited Demonstration at Intel Booth..
  • A. Heinecke: Towards a highly-parallel PDE-Solver using Adaptive Sparse Grids on Compute Clusters [pdf] [BibTeX].
    HIM - Workshop on Sparse Grids and Applications, Bonn, Germany, May 2011.
  • A. Heinecke: Multi- and Many-Core Data Mining with Adaptive Sparse Grids [pdf] [BibTeX].
    2011 ACM International Conference on Computing Frontiers, Ischia, Italy, May 2011.

Volume 2010

  • A. Heinecke: Porting existing cache-oblivious Linear Algebra HPC Modules to Larrabee Architecture [BibTeX].
    2010 ACM International Conference on Computing Frontiers, Bertinoro, Italy, May 2010.

Volume 2009

  • A. Heinecke: Towards many-core implementation of LU decomposition using Peano Curves [BibTeX].
    2009 ACM International Conference on Computing Frontiers, Ischia, Italy, May 2009.

Volume 2008

  • A. Heinecke: Parallel matrix multiplication based on space-filling curves on shared memory multicore platforms [BibTeX].
    ACM International Conference on Computing Frontiers, Ischia, May 2008.