Future Trends in Computing - Summer 16
- Summer 16
- Prof. Dr. Michael Gerndt, Dr. Josef Weidendorfer, Emily Mo-Hellenbrand, M.Sc., Alexander Pöppl, M.Sc., Isaías Alberto Comprés Ureña
- Time and Place
- Students from Master Informatics (IN2107), Computational Science and Engineering (IN2183), and Bachelor Informatics (IN0014)
- Semesterwochenstunden / ECTS Credits
- 2 SWS (2S) / 4 Credits
- Max. number of participants: 12
In the last ten years the period of vast increases in processing power mostly achieved by increasing the clock frequency of a processor has come to an end. Instead, computer architectures are getting more complex in order to accommodate the growing demand for processing power. Modern CPUs typically have a wide range of SIMD instructions for fine-grained data parallelism, and are capable of executing several threads on each of their several cores. Memory accesses are passed through multiple cache levels to hide memory access latencies. In addition to that, hardware specialized in performing massively parallel computations is getting more and more popular. Examples are GPUs and accelerators such as the Xeon Phi. In the HPC context, several nodes, each with its own CPU(s) and GPU(s) may be joined into a cluster.
Regular programming techniques and paradigms are no longer sufficient to fully utilize this hardware. Frameworks such as OpenCL take the structure and heterogeneity of the underlying hardware into account and provide the programming environment to expose all available resources, such as GPUs and accelerators. Novel approaches (such as invasive computing) expose the allocation of resources to the users, allowing them to request required resources and, by offering the reallocation of resources at runtime, enabling them to adapt to changing computing demands.
The behavior of the hardware at runtime also needs to be considered. Modern Cluster architectures are not necessarily capable to run at peak utilization 100% of the time. To avoid the overheating of the hardware and the resulting degradation of the silicon, the clock frequency of the CPU may be drastically reduced, or single nodes may even be shut down completely for a time. Taking these problems into account is an additional challenge developers face today.
Background: The seminar will (partly) discuss research executed in the collaborative research unit Invasive Computing funded by the German Research Foundation (DFG).
Consider the Invasive Computing homepage. We encourage independent research and review of the available literature.
Detailed deadlines will be posted later. These preliminary deadlines are subject to change.
- End of April: submission of paper topic and outline.
- Beginning of June: submission of paper (release candidate) for review.
- Middle of June: submission of 2 reviews.
- End of June: submission of final paper.
Note: Failure to meet these deadlines may result in grade deduction or failure of the course.
- Course language: English
- Independent literature research
- Paper: 5-10 pages (max 10 pages) in total. IEEE format (see link below) required.
- Peer review process: 2 reviews from each participant
- Presentation: 30 minutes talk + 15 minutes discussion
- Mandatory attendance: Participants must attend all presentations. Absence can be excused for "good" reasons with a prior notification to the supervisors. For absence due to sickness, a doctor's attest must be provided.