Difference between revisions of "Next Generation High Performance Computing - Winter 17"

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= Topics =
 
= Topics =
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* Fault Tolerance
 
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* Resource Aware Computing Concepts
 
* Resource Aware Computing Concepts
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* FPGAs for HPC
 
* FPGAs for HPC
 
* Exotic Hardware Architectures for HPC (e.g. Sunway TaihuLight)
 
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{| class="wikitable"
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|-
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| '''Supervisor''' || '''Topic''' || '''Assigned To''' || '''Paper''' || '''Presentation'''
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|-
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| [[Alexander Pöppl, M.Sc.]] || DSLs in HPC || Philipp Trucksäß ||  ||
 +
|-
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| [[Alexander Pöppl, M.Sc.]] || Energy-Aware Computing in HPC || Benedikt Kucis ||  ||
 +
|-
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| [[Emily Mo-Hellenbrand, M.Sc.]] || MIC architecture (Xeon Phi) || Philipp Matthäus ||  ||
 +
|-
 +
| [[Emily Mo-Hellenbrand, M.Sc.]] || Resource Aware Computing Concepts || Elis Bengisu ||  ||
 +
|-
 +
| [http://isaiascompres.com Isaías Alberto Comprés Ureña] || MPI at Exascale || Agnieszka Gaczol ||  ||
 +
|-
 +
| [http://isaiascompres.com Isaías Alberto Comprés Ureña] || Modelling vs. Autotuning in HPC || Charlie Kolb ||  ||
 +
|-
 +
| [[Philipp Samfass, M.Sc.]] || Heterogeneous Computing || Pekka Väänänen ||  ||
 +
|-
 +
| [[Philipp Samfass, M.Sc.]] || Beyond MPI: New Runtime Systems for HPC || Canberk Demirsoy ||  ||
 +
|-
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| [[Dr. rer. nat. Arash Bakhtiari]] || Exotic Hardware Architectures for HPC || Lucas Wolf ||  ||
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|-
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| [[Dr. rer. nat. Arash Bakhtiari]] || Dark Silicon || Johannes Meßmer ||  ||
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|-
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| [[Carsten Uphoff, M.Sc.]] || FPGAs for HPC || Shreyas Shenoy ||  ||
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|-
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| [[Michael Obersteiner, M.Sc.]] || Fault Tolerance || Bernhard Jaeger ||  ||
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|-
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|}
  
 
= Requirements =
 
= Requirements =

Revision as of 08:38, 19 October 2017

Term
Winter 2017/18
Lecturer
Emily Mo-Hellenbrand, M.Sc., Alexander Pöppl, M.Sc., N.N.
Time and Place
Schedule and locations are available in Moodle
Audience
Computational Science and Engineering (Seminar, module IN2183),
Informatics (Master-Seminar, module IN2107),
Max 12 participants.
Tutorials
-
Exam
-
Semesterwochenstunden / ECTS Credits
2 SWS (2S) / 5 ECTS (TUM participants)
TUMonline
TUM Online
Moodle



ORGANIZATIONAL DETAILS AND TOPICS ARE SUBJECT TO CHANGE

News & Dates

  • Kick-off Meeting: Tuesday, October 17 at 13:00 PM in room MI 02.07.023
  • pre-course meeting: Friday, July 7th, 10:00-11:00 in MI 02.07.014

Description

The first generation of exascale supercomputers is expected for the first half of the 2020s. These machines will impose major challenges on simulation codes in order to run efficiently. Many challenges arise from the operation at the physical limits of the hardware and severe energy efficiency constraints. In this seminar, we will focus on the main challenges of exascale computing and discuss the approaches and building block for tackling these challenges.

Background: The seminar will (partly) discuss research executed in the collaborative research unit Invasive Computing funded by the German Research Foundation (DFG), the German priority programme SPPEXA funded by the German Research Foundation (DFG) and the ExaHyPE Project funded by the European Union’s Horizon 2020 research and innovation programme.


Topics

Supervisor Topic Assigned To Paper Presentation
Alexander Pöppl, M.Sc. DSLs in HPC Philipp Trucksäß
Alexander Pöppl, M.Sc. Energy-Aware Computing in HPC Benedikt Kucis
Emily Mo-Hellenbrand, M.Sc. MIC architecture (Xeon Phi) Philipp Matthäus
Emily Mo-Hellenbrand, M.Sc. Resource Aware Computing Concepts Elis Bengisu
Isaías Alberto Comprés Ureña MPI at Exascale Agnieszka Gaczol
Isaías Alberto Comprés Ureña Modelling vs. Autotuning in HPC Charlie Kolb
Philipp Samfass, M.Sc. Heterogeneous Computing Pekka Väänänen
Philipp Samfass, M.Sc. Beyond MPI: New Runtime Systems for HPC Canberk Demirsoy
Dr. rer. nat. Arash Bakhtiari Exotic Hardware Architectures for HPC Lucas Wolf
Dr. rer. nat. Arash Bakhtiari Dark Silicon Johannes Meßmer
Carsten Uphoff, M.Sc. FPGAs for HPC Shreyas Shenoy
Michael Obersteiner, M.Sc. Fault Tolerance Bernhard Jaeger

Requirements

For successful completion of the seminar course you have to fulfil the following tasks:

  • solid understanding of your topic (e.g. by implementation of the underlying algorithm)
  • writing of a paper (IEEE double-column format, 5-10 pages, max 10 pages total)
  • presentation (30 min + discussion)
  • participation in the presentations of all other participants
  • deadlines: Paper final version submission: TBA