Resource-Aware Computing - Summer 15: Difference between revisions

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'''Background:''' The seminar will (partly) discuss research executed in the collaorative research unit [http://invasic.informatik.uni-erlangen.de/ '''Invasive Computing'''] funded by the German Research Foundation (DFG).
'''Background:''' The seminar will (partly) discuss research executed in the collaorative research unit [http://invasic.informatik.uni-erlangen.de/ '''Invasive Computing'''] funded by the German Research Foundation (DFG).


= Topics (preliminary) =
= Topic Assignments =


* Invasive Computing: Concepts
{| class="wikitable"
 
|-
* Invasive Computing: The Framework
| '''First Name''' || '''Last Name''' ||  '''Topic''' || '''Supervisor''' || '''Material'''
 
|-
* Dark silicon (hardware, current Trends, etc)
| Michael || Riesch || Invasive algorithms || [[Alexander Pöppl, M.Sc.]] || -
 
|-
* Faults and Fault-Tolerance
| Nathaniel || Knapp || Resource management for heterogeneous architectures || [[Emily Mo-Hellenbrand, M.Sc.]] || -
 
|-
* Resource management for shared-/distributed-memory architectures
| Christoph || Hartlmüller || Faults and Fault-Tolerance || [[Emily Mo-Hellenbrand, M.Sc.]] || -
 
|-
* Resource management for heterogeneous architectures
| Khalid Fawzi || Alkhalili || Resource management for shared-/distributed-memory architectures || [http://isaiascompres.com Isaías Alberto Comprés Ureña] || -
 
|-
* Invasive algorithms
| Evgeny || Agamirzov || Invasive Network-on-a-Chip architectures (iNoCs) || [http://isaiascompres.com Isaías Alberto Comprés Ureña] || -
|-
| Tamas || Borbáth || Resource aware runtime systems || [http://isaiascompres.com Isaías Alberto Comprés Ureña] || -
|-
| Martin || Schwörer || Invasive Computing: The Framework || [[Emily Mo-Hellenbrand, M.Sc.]] || -
|-
| Felix || Scheffler || Invasive Computing: Concepts || [[Alexander Pöppl, M.Sc.]] || -
|-
| SungJae || Jung || Dark silicon (hardware, current Trends, etc) || [http://www.lrr.in.tum.de/~weidendo/p/index.html Dr. Josef Weidendorfer] || -
|-
| Matthias || Kruk || Power Saving by Dynamic Voltage and Frequency Scaling (DVFS) and Power Capping (PC) || [http://www.lrr.in.tum.de/~weidendo/p/index.html Dr. Josef Weidendorfer] || -
|-
| Michal || Szymczak || Characterization of problems and extraction of patterns || [[Alexander Pöppl, M.Sc.]] || -
|-
| Oleksandr || Shchur || Heterogeneous computing frameworks: OpenCL || [[Alexander Pöppl, M.Sc.]] || -
|-
|}


* Invasive Network-on-a-Chip architectures (iNoCs)
Note: An addition of topics is possible for foreign students that arrive once the semester has started.
 
* Hardware-aware security mechanisms
 
* Heterogeneous computing frameworks: OpenCL
 
* Characterization of problems and extraction of patterns
 
* Power Saving by Dynamic Voltage and Frequency Scaling (DVFS) and Power Capping (PC)
 
* Resource aware runtime systems (for shared-/distributed-memory architectures)
 
Note: Additional topics are possible, the current list is not final.


= Literature =
= Literature =
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|-
|-
|}
|}


= Important Deadlines =
= Important Deadlines =

Revision as of 10:15, 3 March 2015

Term
Summer 15
Lecturer
Univ.-Prof. Dr. Michael Bader, Dr. Josef Weidendorfer, Emily Mo-Hellenbrand, M.Sc., Alexander Pöppl, M.Sc., Isaías Alberto Comprés Ureña
Time and Place
- Initial Meeting: January 21st, 16:00, room 02.09.023
- Kick-off Meeting: t.b.a.
- Flash Talks: t.b.a.
- Presentations: t.b.a. (see Schedule section)
Audience
Students from Master Informatics (IN2107), Computational Science and Engineering (IN2183), and Bachelor Informatics (IN0014)
Tutorials
-
Exam
-
Semesterwochenstunden / ECTS Credits
2 SWS (2S) / 4 Credits
TUMonline
Master Seminar Resource-Aware Computing (IN2183,IN2107,IN0014)



Capacity

  • Max. number of participants: 12

Description

In the last ten years the period of vast increases in processing power mostly achieved by increasing the clock frequency of a processor has come to an end. Instead, computer architectures are getting more complex in order to accommodate the growing demand for processing power. Modern CPUs typically have a wide range of SIMD instructions for fine-grained data parallelism, and are capable of executing several threads on each of their several cores. Memory accesses are passed through multiple cache levels to hide memory access latencies. In addition to that, hardware specialized in performing massively parallel computations is getting more and more popular. Examples are GPUs and accelerators such as the Xeon Phi. In the HPC context, several nodes, each with its own CPU(s) and GPU(s) may be joined into a cluster.

Regular programming techniques and paradigms are no longer sufficient to fully utilize this hardware. Frameworks such as OpenCL take the structure and heterogeneity of the underlying hardware into account and provide the programming environment to expose all available resources, such as GPUs and accelerators. Novel approaches (such as invasive computing) expose the allocation of resources to the users, allowing them to request required resources and, by offering the reallocation of resources at runtime, enabling them to adapt to changing computing demands.

The behavior of the hardware at runtime also needs to be considered. Modern Cluster architectures are not necessarily capable to run at peak utilization 100% of the time. To avoid the overheating of the hardware and the resulting degradation of the silicon, the clock frequency of the CPU may be drastically reduced, or single nodes may even be shut down completely for a time. Taking these problems into account is an additional challenge developers face today.

Background: The seminar will (partly) discuss research executed in the collaorative research unit Invasive Computing funded by the German Research Foundation (DFG).

Topic Assignments

First Name Last Name Topic Supervisor Material
Michael Riesch Invasive algorithms Alexander Pöppl, M.Sc. -
Nathaniel Knapp Resource management for heterogeneous architectures Emily Mo-Hellenbrand, M.Sc. -
Christoph Hartlmüller Faults and Fault-Tolerance Emily Mo-Hellenbrand, M.Sc. -
Khalid Fawzi Alkhalili Resource management for shared-/distributed-memory architectures Isaías Alberto Comprés Ureña -
Evgeny Agamirzov Invasive Network-on-a-Chip architectures (iNoCs) Isaías Alberto Comprés Ureña -
Tamas Borbáth Resource aware runtime systems Isaías Alberto Comprés Ureña -
Martin Schwörer Invasive Computing: The Framework Emily Mo-Hellenbrand, M.Sc. -
Felix Scheffler Invasive Computing: Concepts Alexander Pöppl, M.Sc. -
SungJae Jung Dark silicon (hardware, current Trends, etc) Dr. Josef Weidendorfer -
Matthias Kruk Power Saving by Dynamic Voltage and Frequency Scaling (DVFS) and Power Capping (PC) Dr. Josef Weidendorfer -
Michal Szymczak Characterization of problems and extraction of patterns Alexander Pöppl, M.Sc. -
Oleksandr Shchur Heterogeneous computing frameworks: OpenCL Alexander Pöppl, M.Sc. -

Note: An addition of topics is possible for foreign students that arrive once the semester has started.

Literature

Consider the Invasive Computing homepage. We encourage independent research and review of the available literature.

Schedule

Time Place Description
21.01.2015, 16:00 PM MI 02.09.023 Initial Meeting
1st week: actual time t.b.a. t.b.a. Kick-Off Meeting
3rd week: 27.04.2015, 23:59 PM - Submission of paper outline
3rd week: actual time t.b.a. t.b.a. Flash-Talk Meeting (2-min talk, no slides)
7th week: - Submission of paper draft to supervisor (voluntary)
8th week: 05.06.2015, 23:59 PM - Submission of paper (release candidate) for review
9th week: 12.06.2015, 23:59 PM - Submission of 2 reviews
10th week: actual time t.b.a. t.b.a. Presentation session 1
10th week: actual time t.b.a. t.b.a. Presentation session 2
11th week: actual time t.b.a. t.b.a. Presentation session 3
11th week: actual time t.b.a. t.b.a. Presentation session 4
12th week: actual time t.b.a. t.b.a. Presentation session 5
12th week: actual time t.b.a. t.b.a. Presentation session 6
12th week: 03.07.2015, 23:59 PM - Submission of final paper


Important Deadlines

  • April 27th, 23:59 PM: submission of paper topic and outline.
  • June 5th, 23:59 PM: submission of paper (release candidate) for review.
  • June 12th, 23:59 PM: submission of 2 reviews.
  • July 3rd, 23:59 PM: submission of final paper.

Note: Failure to meet these deadlines may result in grade deduction or failure of the course.

Requirements

  • Course language: English
  • Independent literature research
  • Paper: 5-10 pages (max 10 pages) in total. IEEE format (see link below) required.
  • Peer review process: 2 reviews from each participant
  • Presentation: 30 minutes talk + 15 minutes discussion
  • Mandatory attendance: Participants must attend all presentations. Absence can be excused for "good" reasons with a prior notification to the supervisors. For absence due to sickness, a doctor's attest must be provided.

Grading

  • Major components: Final paper + Presentation
  • Other factors: Attendance, meeting the deadlines, release candidate paper, plagiarism
  • Bonus factors: Commitment, activeness, self-implemented code/examples, etc.

Links

IEEE Latex template